1. Technical Field
Various embodiments relate to a semiconductor apparatus, and more particularly, to a semiconductor apparatus including a plurality of semiconductor chips stacked therein.
2. Related Art
As semiconductor products are highly integrated, a structure including a plurality of semiconductor chips stacked three-dimensionally therein, that is, a stack package has been proposed.
The plurality of semiconductor chips included in the stack package may be electrically connected using a interconnecting member such as a wire which connects between each chip and a package board. The stack package may decrease a fabricating cost, have various performances and be mass-produced. However, with the increase in the number of stacked semiconductor chips, an interconnection space for electrical connection in the stack package is reduced and a height of the stack package increase.
As an example of a stack package considering such a disadvantage, a structure using a through-silicon via (TSV) has been proposed.
The TSVs are formed in each of the semiconductor chips. The TSVs are formed to penetrate the each of the semiconductor chips. The one or more semiconductor chips are physically and electrically stacked and coupled through a connection between TSVs.
Referring to FIG. 1, the first semiconductor chip of the conventional stack package includes a bank unit 110, a TSV insertion unit 120, a pad unit 130, and a TSV control unit 140. The bank unit 110 includes a plurality of banks BANK0 to BANK7 for storing data. The TSV insertion unit 120 includes a plurality of TSVs. For stacking the chips, a TSV of a first semiconductor chip (not shown) is physically and electrically coupled to that of a second semiconductor chip (not shown). The pad unit 130 includes a plurality of power pads 131, a plurality of signal pads 132, and a plurality of probe pad 133 which are alternately arranged. The TSV control unit 140 is configured to control the TSV formed through the TSV insertion unit 120.
As known well, a selected TSV of the first semiconductor chip has to be electrically connected with a selected pad of the pad unit 130 which are formed in the first semiconductor chip. Since the TSV insertion unit 120 is arranged between the bank unit 110 and the pad unit 130 to occupy a predetermined area, the size of the semiconductor chip inevitably increases. Further, it needs a plurality of interconnection lines for connecting between the TSVs and the pads.